The present disclosure relates to a semiconductor memory device and a method of operating the same. More specifically, embodiments disclosed herein relate to a semiconductor memory device and a method of operating the same, which are associated with a data erase operation.
A semiconductor memory device may include a memory array. The memory array may include a plurality of memory cells, which may be classified in block units. That is, the size of a memory block may depend on the number of memory cells included in the memory block. If the semiconductor memory device is a non-volatile memory device, an erase operation may be performed in units of memory blocks.
However, when the number of memory cells in a semiconductor memory device is increased to obtain a high integration density, the number of memory cells included in a memory block may also increase, thus, increasing the size of the memory block. However, since the size of the memory block that may be controlled by a memory controller is fixed, when the size of the memory block increases, the compatibility of the memory block with the memory controller may become problematic.